The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Communication networks typically employ network devices such as bridges and routers to forward information within the network. To efficiently schedule, or otherwise manage, operations within the network, network devices may generate various clock signals. Typically, some of the clock signals within a particular network device are generated independently of each other (e.g., derived from different oscillators) such that they belong to different clock “domains.” As a result, clocks within a network device may differ not only by having different frequencies and phases, but also by experiencing drift relative to one another. This lack of synchronization causes uncertainty, or “jitter,” in the latencies associated with transactions between the different clock domains. For operations or applications requiring highly accurate and precise time alignment between two different clock domains, the latency and jitter inherent in clock domain crossings can be problematic.